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Computer Organization and Design, Fourth Edition: The Hardware/Software Interface (The Morgan Kaufmann Series in Computer Architecture and Design) |  | Authors: David A. Patterson, John L. Hennessy
Publisher: Morgan Kaufmann
List Price: $89.95
Buy New: $52.65
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Media: Paperback
Edition: 4
Pages: 912
Number Of Items: 1
Shipping Weight (lbs): 3.5
Dimensions (in): 9 x 7.5 x 1.7
ISBN: 0123744938
Dewey Decimal Number: 004.6
EAN: 9780123744937
ASIN: 0123744938
Publication Date: November 10, 2008
Availability: Usually ships in 1-2 business days
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| Editorial Reviews:
Amazon.com Review
This textbook provides a basic introduction to the fundamentals of current computer designs. As the title suggests, the text skirts the border between hardware and software. After an overview of the subject and a discussion of performance, the book launches into technical matter such as instruction sets, how they are constrained by the underlying processor hardware, the constraints on their design, and more. An excellent critique of computer arithmetic methods leads to a high-level discussion on processor design. Following is a great introduction to pipelining, nice coverage of memory issues, and solid attention to peripherals. The book concludes with a brief discussion of the additional issues inherent in multiprocessing machines. The extremely lucid description is grounded in real-world examples. Interesting exercises help reinforce the material, and each section contains a write-up of the historical background of each idea. Computer Organization and Design is accessible to the beginner, but also offers plenty of valuable knowledge for experienced engineers.
Product Description
The classic textbook for computer systems analysis and design, Computer Organization and Design, has been thoroughly updated to provide a new focus on the revolutionary change taking place in industry today: the switch from uniprocessor to multicore microprocessors. This new emphasis on parallelism is supported by updates reflecting the newest technologies with examples highlighting the latest processor designs, benchmarking standards, languages and tools. As with previous editions, a MIPS processor is the core used to present the fundamentals of hardware technologies, assembly language, computer arithmetic, pipelining, memory hierarchies and I/O. Along with its increased coverage of parallelism, this new edition offers new content on Flash memory and virtual machines as well as a new and important appendix written by industry experts covering the emergence and importance of the modern GPU (graphics processing unit), the highly parallel, highly multithreaded multiprocessor optimized for visual computing.
Instructors looking for 3rd edition teaching materials should e-mail textbook@elsevier.com.
A new exercise paradigm allows instructors to reconfigure the 600 exercises included in the book to easily generate new exercises and solutions of their own.
A CD provides a toolkit of simulators and compilers along with tutorials for using them as well as additional problems and solutions, and references.
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